一垄青竹映陋室,半枝桃花衬碧窗.

Friday, July 27, 2007

A collection of QAs a long time ago.

This is a collection of QAs from many sources I used about 1 year ago.I put
it here just for latter reference.
--------------------------------------------------------------------------------
#How to get linux kernel?
--------------------------------------------------------------------------------
1).Get the newest kernel

bash$ export CVSROOT=:pserver:anoncvs@anoncvs.handhelds.org:/cvs
bash$ cvs login
password: anoncvs
bash$ cvs checkout linux/kernel26

2).To fetch a particular release branch:

bash$ cvs checkout -r RELEASE_TAG linux/kernel26

3).To fetch the latest versions on a given date:

bash$ cvs checkout -D YYYY-MM-DD linux/kernel26

4).In particular before editing files, you should always update your local copy as follows:

bash$ cvs update -dP
--------------------------------------------------------------------------------
#How to make u-boot-1.1.4 compile with arm-linux-gcc 3.4.1?
--------------------------------------------------------------------------------
1).When there is "cc1: error: invalid option `abi=apcs-gnu'" problem,do:
replace the line in u-boot-1.1.4/cpu/arm1136/config.mk
#PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu)
with
PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,$(call cc-option,-mabi=apcs-gnu),)
2).When there is "/arm-linux/3.4.1/libgcc.a(_divsi3.oS) uses hardware FP, whereas u-boot uses software FP" problem,do:
chage the line in u-boot-1.1.4/cpu/arm1136/config.mk to remove -msoft-float option.

PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 #\
#-msoft-float
3).Should do the following to make a valid u-boot.lds:
cp board/integratorcp/u-boot.lds.template board/integratorcp/u-boot.lds
then edit the CPU_FILE to be
cpu/arm1136/start.o
4)The way to configure and make u-boot:
make cp1136_config
make u-boot


--------------------------------------------------------------------------------
#Repair filesystem [mounting proc filesystem dup2]
--------------------------------------------------------------------------------
Title: Sharing my problem solving experience.
On an ugly morning I received the following message when
booting my NIS server:

mounting proc filesystem [ ERROR ]
dup2: bad file descriptor

My Nis server (TUX) would not boot any further and therefore the
rest of my servers that are dependent on TUX wouldn't boot/respond
either.
After a while of googling I found the following solution
which made me, all of the sudden, very happy and releived:

Begin quote:

How to fix "dup2: bad file descriptor" on Linux
This error is actually happen because the /dev/null entry in the device inode
permission is screwed up
when the system is showing:

mounting proc filesystem [ ERROR ]
dup2: bad file descriptor,

Note: The following step will fix the error:

Proceed with login to repair filesystem (provide root password)
Next mount your root filesystem

mount -n -o remount,rw /dev/hdxx (where hdxx or sdxx is your root partition)
Remove the /dev/null entry
rm -rf /dev/null
Since we've already remove the /dev/null, we have to create a new writeable entry
mknod -m 666 /dev/null c 1 3
Reboot the system using shutdown -r now or shutdown -h now, the filesystem should be
correctly mounted the next round of booting.
--------------------------------------------------------------------------------------------
#How to configure RVDS 3.0 on linux?
--------------------------------------------------------------------------------------------
1)how to install?
Just insert the CD ROM,then go:
mount /dev/cdrom /mnt/cdrom
cd /mnt/cdrom
./setuplinux.bin
2)how to set environment?
just use the command 'source' to set RVDS30env.sh in to PATH
source /opt/ARM/RVDS30Env.sh
3)how to set up flexm license server?
cd /root
vi .flexlmrc
then insert the folowing
ARMLMD_LICENSE_FILE=8224@10.16.10.245
then the rvdebug can be used.
--------------------------------------------------------------------------------------------
#How to set root password for Hiweed Debian linux?
--------------------------------------------------------------------------------------------
1)Use the commands below:
sudo passwd root
then enter your current user's passord
then you need to input the password for the root twice.
--------------------------------------------------------------------------------------------
how to fix a build error that say:
Error: internal_relocation (type: OFFSET_IMM) not fixed up?
--------------------------------------------------------------------------------------------
1)Try using -O1 as the C flasgs.
--------------------------------------------------------------------------------------------
QUESTION
My ARM application does not work. When I run it in the simulator or with my JTAG debugger (ULINK),
I see that the program counter (R15) jumps to the label DAbt_Handler?A. What does that mean? How can
I find the location where my application crashes?
--------------------------------------------------------------------------------------------
ANSWER
This is the default Data Abort exception handler. Your application is trying to read or write an illegal memory
location. You can calculate the illegal memory location using by subtracting 8 from the value in R14 (link register).
Subtracting 8 adjusts for the instruction queue giving you the address of the instruction that caused this exception.
For example:

* R14 value is 0x0000021e
* 0x0000021e - 8 = 0x00000216. The instruction which caused the exception is at address 0x00000216
* The disassembly window shows the instruction STRB R3,[R1,#0x00] at this address with R1=0x000001bc.
The value in R1 points to an on-chip flash area (Philips LPC2000) and cannot be written. In the assembly
window, right click on this line and select Show Source Code for current Address to display your source code.
Probably a pointer was loaded with a bad address.
--------------------------------------------------------------------------------------------
QUESTION
How to build a ARMV6 u-boot target image using arm-linux-gcc 3.4.1 cross compiler?
--------------------------------------------------------------------------------------------
ANSWER
1)Edit file u-boot/cpu/arm1136/config.mk to change the line
PLATFORM_CPPFLAGS += -march=armv6j
note that we should add a 'j' after armv6.
2)Note that upto 3.4.1 of the tool chain,it still produce code which will encounter " CP15 Unimplemented behaviour
hit: MCR p15,0,R0,c15,c2,4" problem(seen from Realview ICE shell),this may because it is not actually support all
ARMV6 instructions.so,you might swithc to use the tool chain found here:
http://www.codesourcery.com/gnu_toolchains/arm/index_html,
but you can make your own (with some skills).

--------------------------------------------------------------------------------------------
QUESTION
How to use CodeSorc GNU cross compiler to buid linux kernel?
--------------------------------------------------------------------------------------------
# let's say the G500 directory is our prefered directory these times...
cd G500

# unpack the codesourcery toolchain and update PATH
tar xjf arm-2006q1-6-arm-none-linux-gnueabi-i686-pc-linux-gnu.tar.bz2
export PATH=$PATH:$PWD/bin

# unpack the linux kernel
tar xjf linux-2.6.16.11.tar.bz2

# configure and build the kernel
cd linux-2.6.16.11
make mrproper
make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi- menuconfig
make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi-

# TODO : add some light documentation on busybox and a small initrd building
--------------------------------------------------------------------------------------------
QUESTION
How to fix "Source object XX has EABI version 0, but target has EABI version 4" when build u-boot with
codesourcery 2006Q1 GUN cross compiler release?
--------------------------------------------------------------------------------------------
ANSWER
It seems that swith the cC option -mabi to -mabi=aapcs will fix the problem.
--------------------------------------------------------------------------------------------
QUESTION
How to fix `__aeabi_unwind_cpp_pr0' problem?
--------------------------------------------------------------------------------------------

nueabi/4.1.0 -lgcc \
-Map u-boot.map -o u-boot
/usr/local/arm/codesourcery/bin/../lib/gcc/arm-none-linux-gnueabi/4.1.0/libgcc.a(_dvmd_lnx.o): In function `__div0':
/scratch/paul/release/src/gcc-2006q1/gcc/config/arm/lib1funcs.asm:(.text+0x8): undefined reference to `raise'
/usr/local/arm/codesourcery/bin/../lib/gcc/arm-none-linux-gnueabi/4.1.0/libgcc.a(_divdi3.o):(.ARM.exidx+0x0): undefined reference to `__aeabi_unwind_cpp_pr0'
/usr/local/arm/codesourcery/bin/../lib/gcc/arm-none-linux-gnueabi/4.1.0/libgcc.a(_udivdi3.o):(.ARM.exidx+0x0): undefined reference to `__aeabi_unwind_cpp_pr0'
make: *** [u-boot] Error 1

--------------------------------------------------------------------------------------------
QUESTION
how to build cross compiler using crosstool?
--------------------------------------------------------------------------------------------
First of all, I would like to thank Dan for its so useful crosstool.

I'm developing an embedded board which is based on Freescale iMX31, so a
very nice ARM1136 core. I've got a development board with this chip
which has Linux, and while our prototype is being built, I'm playing
with it.

I've used crosstool-0.42 to build a simple arm toolchain using my simple
script that I past here (just in case):

> #!/bin/sh
> set -ex
> TARBALLS_DIR=$HOME/downloads
> export TARBALLS_DIR
> mkdir -p TARBALLS_DIR
>
> RESULT_TOP=/opt/crosstool
> export RESULT_TOP
> mkdir -p RESULT_TOP
>
> GCC_LANGUAGES="c,c++"
> export GCC_LANGUAGES
>
> KERNELCONFIG=$PWD/arm.config
> export KERNELCONFIG
>
> TARGET=arm-linux
> export TARGET
> TARGET_CFLAGS="-O"
> export TARGET_CFLAGS
>
> BINUTILS_DIR=binutils-2.15
> GCC_DIR=gcc-3.4.2
> GLIBC_DIR=glibc-2.3.3
> GLIBCTHREADS_FILENAME=glibc-linuxthreads-2.3.3
> LINUX_DIR=linux-2.6.10
> export BINUTILS_DIR GCC_DIR GLIBC_DIR GLIBCTHREADS_FILENAME LINUX_DIR
>
> eval sh all.sh --notest
>
> echo Done.
>

--------------------------------------------------------------------------------
Very Simple Guide for Building Cross Compilers Tips

--------------------------------------------------------------------------------
The following is steps to build cross compilers. So far, I tried only for PowerPC and MIPS.

Basically, all you have to do is to follow the following 9 steps.

Download sources
Set environment variables
Build binutils
Build bootstrap gcc
Build newlib
Build gcc again with newlib
GDB with PSIM
Compile your code
Run

--------------------------------------------------------------------------------

1. What do you need?
First, you have to obtain the following source codes

binutils http://www.gnu.org/software/binutils/
GCC http://www.gnu.org/software/gcc/gcc.html
newlib http://sources.redhat.com/newlib/
GDB http://www.gnu.org/software/gdb/gdb.html
2. Set environment variables
First, choose your taget such as powerpc-eabi, powerpc-elf, mips-elf, and so on

For bash simply type

% export TARGET=arm-eabi
% export PREFIX=/usr/local/arm/$TARGET
% export PATH=$PATH:$PREFIX/bin
3. Build binutils
% tar xjfv binutils-2.16.tar.bz2
% mkdir build-binutils
% cd build-binutils
% ../binutils-2.16/configure --target=$TARGET --prefix=$PREFIX --disable-nls --disable-werror
% make all
% make install
4. Build bootstrap GCC
% tar xjfv gcc-3.4.4.tar.bz2
% mkdir build-gcc
% cd build-gcc
% ../gcc-3.4.4/configure --target=$TARGET --prefix=$PREFIX --without-headers --with-newlib --with-gnu-as --with-gnu-ld
% make all-gcc
% make install-gcc
--with-gnu-as --with-gnu-ld prevents native assembler on certain architectures. (for others, these do not have any effects)

5. Build newlib
Newlib provides standard C library for embedded systems

% tar xzfv newlib-1.13.0.tar.gz
% mkdir build-newlib
% cd build-newlib
% ../newlib-1.13.0/configure --target=$TARGET --prefix=$PREFIX
% make all
% make install
6. Build GCC again with newlib
% cd build-gcc
% ../gcc-3.4.4/configure --target=$TARGET --prefix=$PREFIX --with-newlib --with-gnu-as --with-gnu-ld
% make all
% make install
7. GDB with PSIM
% tar xjfv gdb-6.3.tar.bz2
% mkdir build-gdb
% cd build-gdb
% ../gdb-6.3/configure --target=$TARGET --prefix=$PREFIX --enable-sim-powerpc
--enable-sim-stdio
% make all
% make install
Congratulations! You build your tool chain

8. Compile your code
Now, it's time to compile your code.

% powerpc-eabi-gcc -mcpu=405 hello.c -o hello -msim
% mips-elf-gcc -Tidt.ld -mips4 hello.c -o hello
-T option specifies libraries that include start code.

To Compile with specific Memory map

% powerpc-eabi-gcc -Wl,-Ttext,0x4000,-Tdata,0xf000 hello.c -msim
(-Wl,-Ttext,0x4000,-Tdata,0x10000)
9. Run
% powerpc-eabi-run hello
% mips-elf-run hello

--------------------------------------------------------------------------------

configure flags: --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu \
--target=arm-none-eabi --enable-languages=c,c++ --enable-shared --enable-threads \
--disable-libmudflap --disable-libssp --disable-libgomp --disable-libstdcxx-pch --disable-libunwind-exceptions \
--with-gnu-as --with-gnu-ld --prefix=/opt/codesourcery --with-newlib \
--with-versuffix='CodeSourcery ARM Sourcery G++ 2006q3-18' --with-bugurl=mailto:arm-gnu@codesourcery.com \
--disable-nls --with-sysroot=/opt/codesourcery/arm-none-eabi \
--with-build-sysroot=/scratch/gcc/nightly-2006-09-01-csl-arm/arm-none-eabi/build_gcc/install/arm-none-eabi

> > While configuring the gcc which you will use to build glibc you should
> > use this configure option--disable-libunwind-exceptions (assuming you
> > are using GCC 4.1)
> > and set libc_cv_forced_unwind=yes in config.cache while building glibc.

--------------------------------------------------------------------------------
QUESTION
When building binutils,a problem occured:
`@value{srcdir}/../libiberty/at-file.texi': No such file or directory.
How to fix it?
--------------------------------------------------------------------------------
ANSWER

Just delete the line in binutils.texi line 3522
#@include @value{top_srcdir}/../libiberty/at-file.texi
and as.texinfo line 454
#@include @value{top_srcdir}/../libiberty/at-file.texi
ld.texinfo line 345
#@include @value{top_srcdir}/../libiberty/at-file.texi
gcc/doc/invoke.texi line 1060
#@include @value{srcdir}/../libiberty/at-file.texi
See below
Hello!

> Mark Mitchell's @file documentation change adds a @set directive to
> gcc-vers.texi in the build directory, but that file only depends on
> DEV-PHASE and BASE-VER, so it will never be correctly rebuilt using
> the new make rule. Just deleting it will remedy the problem.

Another problem is in the fact that value references in @include commands are
expanded only from texinfo version 4.4 and newer. This means, that version 4.4
or higher of texinfo is _required_ to build the documentation.

Interested people could check texinfo's ChangeLog.46 for the changeset:

2003-01-12

...

* makeinfo/cmds.c (handle_include): call text_expansion on the
filename, so @value constructs are expanded.

* doc/texinfo.txi (verbatiminclude, Using Include Files): mention
@value expansion.

...

Using texinfo 4.2, bootstrap fails with:

if [ xinfo = xinfo ]; then \
makeinfo --split-size=5000000 --split-size=5000000 --no-split -I . -I
../../gcc-svn/trunk/gcc/doc \
-I ../../gcc-svn/trunk/gcc/doc/include -o doc/gcc.info
../../gcc-svn/trunk/gcc/doc/gcc.texi; \
fi
../../gcc-svn/trunk/gcc/doc/invoke.texi:1057: @include
`@value{srcdir}/../libiberty/at-file.texi': No such file or directory.
makeinfo: Removing output file `doc/gcc.info' due to errors; use --force to
preserve.
gmake[2]: *** [doc/gcc.info] Error 2

Attached (untested) diff should update the required version of texinfo.

----------------------------------------------------------------------------
QUESTION
How to fix u-boot S29GL128N CFI flash can not erase and write problem?
----------------------------------------------------------------------------
Hi all,

Does anybody test the cfi flash driver (cfi_flash.c) with a x8/x16
flash configured in x8 mode ? I'm trying to port U-Boot for a Lite5200B
with a S29GL128N flash (CFI compliant) using the cfi flash driver.
U-Boot detects the flash correctly but It's unable to erase or write the
flash. In my case the following patch fix the bug but I'm not completly
sure If It's only a bug with my configuration. Any suggestions? Could
anybody test the patch in other architecture?

My configuration for the cfi driver is:

#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */
#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
#undef CONFIG_FLASH_16BIT /* Flash is 8-bit */
#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI
#define CFG_FLASH_BANKS_LIST {CFG_CS1_START,CFG_CS0_START}

And the patch:

--- ../tmp/u-boot/drivers/cfi_flash.c 2006-01-12 12:22:08.000000000 +0100
+++ drivers/cfi_flash.c 2006-01-12 13:35:11.000000000 +0100
@@ -107,9 +107,19 @@

#define AMD_STATUS_TOGGLE 0x40
#define AMD_STATUS_ERROR 0x20
+
+#if 0
#define AMD_ADDR_ERASE_START 0x555
#define AMD_ADDR_START 0x555
#define AMD_ADDR_ACK 0x2AA
+#else
+int amd_addr_erase_start = 0x555;
+int amd_addr_start = 0x555;
+int amd_addr_ack = 0x2AA;
+#define AMD_ADDR_ERASE_START amd_addr_erase_start
+#define AMD_ADDR_START amd_addr_start
+#define AMD_ADDR_ACK amd_addr_ack
+#endif

#define FLASH_OFFSET_CFI 0x55
#define FLASH_OFFSET_CFI_RESP 0x10
@@ -1111,6 +1121,9 @@ ulong flash_get_size (ulong base, int ba
info->flash_id = FLASH_MAN_CFI;
if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth ==
FLASH_CFI_BY8)) {
info->portwidth >>= 1; /* XXX - Need to test on x8/x16
in parallel. */
+ amd_addr_erase_start = 0xAAA;
+ amd_addr_start = 0xAAA;
+ amd_addr_ack = 0x555;
}
}

Best regards,
Jose Maria Lopez.

Saturday, July 07, 2007

Clock Controller Module for IMX31

CCM包括FPM(频率预乘)和PLL控制,时钟分布,复位信号产生,以及高级功耗管理等;

第一部分)FPM(频率预乘)和PLL控制

IMX31有3个独立的DPLL,利用PLL时钟源的频率产生3个独立的输出时钟频率,用于3个
不同的时钟域的时钟,包括MCU CLK,USB CLK,SERIAL CLK三个时钟域;时钟源
可以是外部直接的高频时钟(CKIH),或者对低频外部时钟(CKIL)通过FPM来产生高
频时钟源,这种选择是通过对DPLL的寄存器编程来完成的。这种选择可以通过外部管
脚ipp_clkss在复位时的状态或者通过设置CCMR寄存器的PRCS域值来完成。























第二部分)时钟分布

下面我们结合上图来详细分析IMX31的时钟分布情况。

1)CKIL可以是32 kHz, 32.768 kHz 或者 38.4 kHz 的crystal,一方面直接供给RTC时钟;
另一方面接FPM,产生1024*CKIL的输出,作为pll_ref_clk的选项之一。
2)MCU时钟域的关键是MCU Clock Domain Clock Source Switch Unit,该单元的输出
mcu_main_clk可能来自于pll_ref_clk,mpl_dpdgck_clk (MCU PLL output), and
spl_dpdgck_clk (SRPLL output)之一。在pll_ref_clk,mpl_dpdgck_clk之间的选择是通过
设置CCMR寄存器的MPE(使能MCU PLL)和MDS(时钟源选择)来完成的。通过DVFS
(dynamic voltage frequency scaling)的使能来进一步选择是否使用spl_dpdgck_clk作为mcu_main_clk输出。
A)mcu_clk (ipg_clk_arm),用于ARM核,
可达532MHz,用PDR0寄存器MCU_PODF
域来控制;
B)max_clk sub-domain (ipg_clk_ahb),
用于ARM的内部的外设,如十字开关;最大
133MHz,通过PDR0寄存器的MAX_PDOF
来控制;
C)hsp_clk is the clock for the IPU;最大
133MHz,通过PDR0寄存器的HSP_PDOF
来控制;
D)ipg_clk sub-domain clk用于片上的IP外设,
最大62.5MHz,用PDR0寄存器的IPG_PDOF
来控制;
E)nfc_clk (ipg_clk_nfc_20m)通过PDR0寄存器的NFC_PDOF来控制;
F)ckil_mcu_sync_ipg is for the peripheral modules,32-kHz clock。
G)ipg_clk_gacc_mbx_clk is for the MBX module. It is 1/2 of the ipg_ahb_clk,66 MHz.
3)USB 时钟域和SERIAL时钟域和MCU时钟域的分布方法类似,此处略去。

Friday, July 06, 2007

NAND FLASH Controler for IMX31

与NOR Flash相比,NAND Flash的bit cell小,但是顺序
访问速度快;NOR Flash的bit cell大,但是随机访问速
度快;因此,通常用NAND来存放音频或者视频文件,而
用NOR来存放代码;

IMX31集成了NANDFC用以控制NAND FLASH,其中包括控制逻辑,2KB
RAM Buffer(用以在Coldboot时当作bootRAM,此后当作常规的bufferRAM)。
接口方面,NANDFC对内使用X16/X32方式与AHB接口;对外支持标准的
X8/X16的NAND FLASH;支持512B/2KB的PageSize。当AHB host需要读取
Nand flash的内容时,只需要设置NANDFC,NANDFC自动从NAND中读取
一个Page的数据到bufferRAM中,并产生中断来通知host,host就只需要从
这个内部的bufferRAM中读取一个Page的数据;当host要写NAND时,也只
需要配置NANDFC,并向这个buuferRAM写内容,再写一个编程命令。

NANDFC的操作模式由NFC_FMS, /F8BOOT, /NF16BOOT, NF_16BIT_SEL
四条线决定。通过boot配置,可以选择系统从NAND启动。这时,/F8BOOT,
/NF16BOOT其中之一低有效,从而也决定了总线宽度;NFC_FMS则决定NAND
的PageSize是512B还是2KB;如果不是从NAND启动,则NF_16BIT_SEL决定
总线的宽度(0为8位,1为16位)。












需要注意的是,如果/hreset在bootcode copy完成之后才上跳变为1,
则/ipi_int_nfc中断信号需要等到/hreset上跳变之后才能下跳变为0;
否则,如果/hreset在bootcode copy完成之前才已经跳变为1,那么
/ipi_int_nfc中断信号会在/hreset上跳变之后立即跳变为0。

Booting for IMX31

1)Boot Type的判断
当上电复位期间,CPU采样外部Pins的BOOT[3..0],结合IC标示模块
(IIM)中的保险丝的INT_BOOT位的状态判断Boot Type;如果
INT_BOOT位烧断,则直接从0地址执行;否则才根据BOOT[3..0]
作进一步判断是否从内部的iROM启动或者是从外部内存启动。
因此INT_BOOT位具有更高的优先权。
2)Endian Mode的选择
CPU本来是以Little Endian模式启动的,但是如果启动配置通过
BOOT[3..0]选择了外部启动,则可以进一步通过IIM的BIG_ENDIAN
保险丝位来选择Big Endian模式。
3)用RAM Loader进行Flash ROM Image的下载和烧写
上电复位后,启动代码从0地址开始执行,并检查HAB_TYPE,
确认是0b001(即用于开发模式),并且BOOT[3..0]=0b0000,
则进行一些初始化和安全性检查,并通过UART或USB下载。这里面
实际上包括两个阶段:先是初始化一个与PC机的通道,用来初始化
SDRAM;接着再下载Flash Loader和Flash Image;再接着调用
Flash Loader来将Flash Image烧写到Flash ROM。当然,其中还有
通过HAB校验的过程。所以最重要的还是初始化SDRAM的过程。
4)通过iROM启动
上电复位后,启动代码从0地址开始执行,并检查HAB_TYPE,
确认是0b001(即用于开发模式),并且BOOT[3..0]的配置是使用
FLASH(NAND or NOR)启动,则进行一些初始化和安全性检查,并
调用HAB进行完整性校验,然后跳转到FLASH的启动地址执行。这
应该就是常规的bootloader(u-boot或者redboot)的启动方式。

Wednesday, July 04, 2007

blogspot被封后的访问方法

http://www.pkblogs.com/coryxie

Monday, July 02, 2007

LDO的基本原理与应用

一.LDO的基本原理

低压差线性稳压器(LDO)的基本电路如图1-1所示,该电路由串联调整管VT、取样电阻R1和R2、比较放大器A组成。

图1-1 低压差线性稳压器基本电路

取样电压加在比较器A的同相输入端,与加在反相输入端的基准电压Uref相比较,两者的差值经放大器A放大后,控制串联调整管的压降,从而 稳定输出电压。当输出电压Uout降低时,基准电压与取样电压的差值增加,比较放大器输出的驱动电流增加,串联调整管压降减小,从而使输出电压升高。相 反,若输出电压Uout超过所需要的设定值,比较放大器输出的前驱动电流减小,从而使输出电压降低。供电过程中,输出电压校正连续进行,调整时间只受比较 放大器和输出晶体管回路反应速度的限制。

应当说明,实际的线性稳压器还应当具有许多其它的功能,比如负载短路保护、过压关断、过热关断、反接保护等,而且串联调整管也可以采用MOSFET。

二.低压差线性稳压器的主要参数

1.输出电压(Output Voltage)

输出电压是低压差线性稳压器最重要的参数,也是电子设备设计者选用稳压器时首先应考虑的参数。低压差线性稳压器有固定输出电压和可调输出电 压两种类型。固定输出电压稳压器使用比较方便,而且由于输出电压是经过厂家精密调整的,所以稳压器精度很高。但是其设定的输出电压数值均为常用电压值,不 可能满足所有的应用要求,但是外接元件数值的变化将影响稳定精度。

2.最大输出电流(Maximum Output Current)

用电设备的功率不同,要求稳压器输出的最大电流也不相同。通常,输出电流越大的稳压器成本越高。为了降低成本,在多只稳压器组成的供电系统中,应根据各部分所需的电流值选择适当的稳压器。

3.输入输出电压差(Dropout Voltage)

输入输出电压差是低压差线性稳压器最重要的参数。在保证输出电压稳定的条件下,该电压压差越低,线性稳压器的性能就越好。比如,5.0V的低压差线性稳压器,只要输入5.5V电压,就能使输出电压稳定在5.0V。

4.接地电流(Ground Pin Current)

接地电路IGND是指串联调整管输出电流为零时,输入电源提供的稳压器工作电流。该电流有时也称为静态电流,但是采用PNP晶体管作串联调整管元件时,这种习惯叫法是不正确的。通常较理想的低压差稳压器的接地电流很小。

5.负载调整率(Load Regulation)

负载调整率可以通过图2-1和式2-1来定义,LDO的负载调整率越小,说明LDO抑制负载干扰的能力越强。

图2-1 Output Voltage&Output Current

(2-1)

式中

△Vload—负载调整率

Imax—LDO最大输出电流

Vt—输出电流为Imax时,LDO的输出电压

Vo—输出电流为0.1mA时,LDO的输出电压

△V—负载电流分别为0.1mA和Imax时的输出电压之差

6.线性调整率(Line Regulation)

线性调整率可以通过图2-2和式2-2来定义,LDO的线性调整率越小,输入电压变化对输出电压影响越小,LDO的性能越好。

图2-2 Output Voltage&Input Voltage

(2-2)

式中

△Vline—LDO线性调整率

Vo—LDO名义输出电压

Vmax—LDO最大输入电压

△V—LDO输入Vo到Vmax'输出电压最大值和最小值之差

7.电源抑制比(PSSR)

LDO的输入源往往许多干扰信号存在。PSRR反映了LDO对于这些干扰信号的抑制能力。

三.LDO的典型应用

低压差线性稳压器的典型应用如图3-1所示。图3-1(a)所示电路是一种最常见的AC/DC电源,交流电源电压经变压器后,变换成所需要 的电压,该电压经整流后变为直流电压。在该电路中,低压差线性稳压器的作用是:在交流电源电压或负载变化时稳定输出电压,抑制纹波电压,消除电源产生的交 流噪声。

各种蓄电池的工作电压都在一定范围内变化。为了保证蓄电池组输出恒定电压,通常都应当在电池组输出端接入低压差线性稳压器,如图3-1 (b)所示。低压差线性稳压器的功率较低,因此可以延长蓄电池的使用寿命。同时,由于低压差线性稳压器的输出电压与输入电压接近,因此在蓄电池接近放电完 毕时,仍可保证输出电压稳定。

众所周知,开关性稳压电源的效率很高,但输出纹波电压较高,噪声较大,电压调整率等性能也较差,特别是对模拟电路供电时,将产生较大的影 响。在开关性稳压器输出端接入低压差线性稳压器,如图2-3(c)所示,就可以实现有源滤波,而且也可大大提高输出电压的稳压精度,同时电源系统的效率也 不会明显降低。

在某些应用中,比如无线电通信设备通常只有一足电池供电,但各部分电路常常采用互相隔离的不同电压,因此必须由多只稳压器供电。为了节省 共电池的电量,通常设备不工作时,都希望低压差线性稳压器工作于睡眠状态。为此,要求线性稳压器具有使能控制端。有单组蓄电池供电的多路输出且具有通断控 制功能的供电系统如图3-1(d)所示。




附注:
1)什么是线性稳压电源?有什么特点?
根据调整管的工作状态,我们常把稳压电源分成两类:线性稳压电源开关稳压电源。此外,还有一种使用稳压管的小电源

这里说的线性稳压电源,是指调整管工作在线性状态下的直流稳压电源。调整管工作在线性状态下,可这么来理解:RW见下面的分析)是连续可变的,亦即是线性的。而在开关电源中则不一样,开关管(在开关电源中,我们一般把调整管叫做开关管)是工作在开、关两种状态下的:开——电阻很小;关——电阻很大。工作在开关状态下的管子显然不是线性状态。

线性稳压电源是比较早使用的一类直流稳压电源。线性稳压直流电源的特点是:输出电压比输入电压低;反应速度快,输出纹波较小;工作产生的噪声低;效率较低(现在经常看的LDO就是为了解决效率问题而出现的);发热量大(尤其是大功率电源),间接地给系统增加热噪声

工作原理:我们先用下图来说明线性稳压电源调节电压的原理。如下图所示,可变电阻RW跟负载电阻RL组成一个分压电路,输出电压为:

Uo=Ui×RL/(RW+RL),因此通过调节RW的大小,即可改变输出电压的大小。请注意,在这个式子里,如果我们只看可调电阻RW的值变化,Uo的输出并不是线性的,但如果把RWRL一起看,则是线性的。还要注意,我们这个图并没有将RW的引出端画成连到左边,而画在右边。虽然这从公式上看并没有什么区别,但画在右边,却正好反映了“采样”和“反馈”的概念----实际中的电源,绝大部分都是工作在采样和反馈的模式下的,使用前馈方法很少,或就是用了,也只是辅助方法而已。

让我们继续:如果我们用一个三极管或者场效应管,来代替图中的可变阻器,并通过检测输出电压的大小,来控制这个“变阻器”阻值的大小,使输出电压保持恒定,这样我们就实现了稳压的目的。这个三极管或者场效应管是用来调整电压输出大小的,所以叫做调整管

像图1所示的那样,由于调整管串联在电源跟负载之间,所以叫做串联型稳压电源。相应的,还有并联型稳压电源,就是将调整管跟负载并联来调节输出电压,典型的基准稳压器TL431就是一种并联型稳压器。所谓并联的意思,就是象图2中的稳压管那样,通过分流来保证衰减放大管射极电压的“稳定”,也许这个图并不能让你一下子看出它是“并联”的,但细心一看,确实如此。不过,大家在此还要注意一下:此处的稳压管,是利用它的非线性区工作的,因此,如果认为它是一个电源,它也是一个非线性电源。为了便于大家理解,回头我们找一个理适合的图来看,直到可以简明地看懂为止。

由于调整管相当于一个电阻,电流流过电阻时会发热,所以工作在线性状态下的调整管,一般会产生大量的热,导致效率不高。这是线性稳压电源的一个最主要的一个缺点。想要更详细的了解线性稳压电源,请参看模拟电子线路教科书。这里我们主要是帮助大家理清这些概念以及它们之间的关系。

图1

一般来说,线性稳压电源由调整管、参考电压、取样电路、误差放大电路等几个基本部分组成。另外还可能包括一些例如保护电路,启动电路等部分。下图是一个比较简单的线性稳压电源原理图(示意图,省略了滤波电容等元件),取样电阻通过取样输出电压,并与参考电压比较,比较结果由误差放大电路放大后,控制调整管的导通程度,使输出电压保持稳定。

点击看大图

图2

常用的线性串联型稳压电源芯片有:78XX系列(正电压型),79XX系列(负电压型)(实际产品中,XX用数字表示,XX是多少,输出电压就是多少。例如7805,输出电压为5V);LM317(可调正电压型),LM337(可调负电压型);1117(低压差型,有多种型号,用尾数表示电压值。如1117-3.33.3V1117-ADJ为可调型)。

(By computer00 @2006-2-12)

2)什么是开关稳压电源?有什么特点?
根据调整管的工作状态,我们常把稳压电源分成两类:线性稳压电源开关稳压电源

线性稳压电源,是指调整管工作在线性状态下的稳压电源。而在开关电源中则不一样,开关管(在开关电源中,我们一般把调整管叫做开关管)是工作在开、关两种状态下的:开——电阻很小;关——电阻很大

开关电源是一种比较新型的电源。它具有效率高,重量轻,可升、降压,输出功率大等优点。但是由于电路工作在开关状态,所以噪声比较大 通过下图,我们来简单的说说降压型开关电源的工作原理。如图所示,电路由开关K(实际电路中为三极管或者场效应管),续流二极管D储能电感L滤波电容C等构成。当开关闭合时,电源通过开关K、电感L负载供电,并将部分电能储存在电感L以及电容C中。由于电感L的自感,在开关接通后,电流增大得比较缓慢,即输出不能立刻达到电源电压值。一定时间后,开关断开,由于电感L的自感作用(可以比较形象的认为电感中的电流有惯性作用),将保持电路中的电流不变,即从左往右继续流。这电流流过负载,从地线返回,流到续流二极管D的正极,经过二极管D返回电感L的左端,从而形成了一个回路。通过控制开关闭合跟断开的时间(PWM——脉冲宽度调制),就可以控制输出电压。如果通过检测输出电压来控制开、关的时间,以保持输出电压不变,这就实现了稳压的目的。

在开关闭合期间,电感存储能量;在开关断开期间,电感释放能量,所以电感L叫做储能电感。二极管D在开关断开期间,负责给电感L提供电流通路,所以二极管D叫做续流二极管

在实际的开关电源中,开关K由三极管或场效应管代替。当开关断开时,电流很小;当开关闭合时,电压很小,所以发热功率U×I就会很小。这就是开关电源效率高的原因。

看过完两个关于电源的FAQ后,大家可能对电源的效率计算还不了解。在后面的FAQ中,我们将专门给大家介绍。

常见的用于开关电源的芯片有:TL494LM2575LM26733406351414等等。

(By comoputer00 @2006-2-12)

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